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Title: Hardware/Buses - The I/O Bus This article covers bus, its history and status, PCI, EISA, MCA, bus mastering, plug and play, and the bleeding edge. From Introduction to PC Hardware.
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The I/O Bus [Up] [Previous][Next]10 Nov 1995

The I/O Bus

A personal computer may transfer data from disk to CPU, from CPUto memory, or from memory to the display adapter. A PC cannotafford to have separate circuits between every pair of devices.A mechanical switch, like the old phone systems used, would betoo slow.The solution is a Bus. The Bus is simply a common set ofwires that connect all the computer devices and chips together.Some of these wires are used to transmit data. Some send housekeepingsignals, like the clock pulse. Some transmit a number (the "address")that identifies a particular device or memory location. The computerchips watch the address wires and respond when their identifyingnumber is transmitted. They then transfer data on the other wires.From the first IBM PC up through the first PS/2 computers (introducedin 1987) a computer had one bus and all of its devices and chipsran at the same speed. On those systems, additional computer memorywas often added by plugging an adapter card into the same slotsthat held I/O adapters. Starting with machines that used the 386CPU, the memory and CPU of the system ran faster than the I/Odevices. The solution was to separate the CPU and memory fromall the I/O. Today, memory is only added by plugging it into specialsockets on the main computer board.Whether there is more than one Bus, or one Bus with differentspeeds, is a matter of perspective. A car drives down the localstreets at 25 miles per hour. Then it turns onto a highway rampand accelerates to 55. Is there one road system, or two? The importantthing is that there is a connection that allows a flow of trafficbetween the two speed zones. Within the PC, data can flow fromany chip to any other chip, but different parts of the path runat different speeds.Analogy Alert: Electricity flows through wire at the samespeed everywhere (at about the speed of light). So a "faster"bus is not one where the electrons move faster, but rather onein which the time between meaningful events (the "clock speed")is faster. On a faster bus the chips have to react more quickly,and the engineering has to be more rigorous so that voltage signalscan be clean and tight.In a modern PC, there may be a half dozen different Bus areas.There is certainly a "CPU area" that still containsthe CPU, memory, and basic control logic. There is a "HighSpeed I/O Device" area that is either a VESA Local Bus (VLB)or an PCI Bus. An very low cost home computer may have no highspeed devices. A more typical desktop system connects the highspeed bus on the mainboard to the display adapter and IDE diskinterface chip. Then one or two extra I/O slots may allow adaptercards to connect to the high speed bus. The remaining I/O deviceslots support standard "ISA" bus cards. Some computerswill also provide sockets for a number of PCMCIA "creditcard" adapters commonly found in laptop computers.

History

In 1984 IBM was shipping its PC AT model. The CPU, memory, andI/O bus all shared a common 8MHz clock. This became the basisfor all subsequent clone computers. The term "AT" isa registered trademark of IBM, so this I/O bus became known asthe ISA (Industry Standard Architecture) bus.Every currently marketed PC supports some ISA interface slots. The bus and matching adapter cards are simple and cheap. ISAis a 16-bit interface, which means that data can be transferredonly two bytes at a time. More importantly, the ISA bus runsat only 8 MHz and it typically requires two or three clock ticksto transfer those two bytes of data. This is not a problem fordevices that are inherently slow like the COM port (modem), theprinter port, the sound card, or the CD-ROM. However, the ISAbus is too slow for high performance disk access and thereforeis not acceptable in Servers. It is also too slow for modern Windowsdisplay adapters. In 1987 IBM introduced a new Microchannel (MCA) bus. Ithad clear advantages over the previous PC bus. It's 10 MHz clockwas slightly faster. The cards could be automatically configuredwith a utility program instead of setting physical switches andjumpers. The bus can transfer four bytes of data at a time and,in some configurations and with some cards, it can transfer dataevery clock tick. However, the Microchannel itself was expensive,the adapter cards were more expensive, and the technology remainedencumbered by IBM licensing.The other vendors developed an extension of the older ISA interfacecalled EISA. An EISA slot contained the older ISA interface,and then an extra socket with additional connections. The usercould plug either an old ISA card or a new EISA card into theslot. The newer cards supported a 32-bit data interface and couldtherefore transfer four bytes of data per operation. However,to remain compatible with the old card, EISA still ran at 8MHz. And the extra logic pushed up the cost of both the EISA systemand each adapter card.As the 486 CPU chip became popular, the idea of running I/O devicesat 8 or 10 MHz collided with a mainboard that ran everything elseat 33 MHz. It was also clear that it should not require an extra$500 to transfer data at 32-bits.The first solution was the VESA Local Bus (VLB), whichbecame popular at the start of 1993. VESA is a consortium of companiesmaking displays and display adapters. Desktop machines began toinclude one or two Local Bus slots to support a high speed videocard and, perhaps, one other high speed device. A few vendorsproduced VESA SCSI adapter cards, or Local Bus LAN adapters. Nevertheless,VESA remained largely a display standard.

PCI - The Current Standard

The PCI bus was developed by Intel. Although it is mostlyknown for its CPUs, Intel also has a historical association withEthernet, multimedia, and some disk interfaces. So Intel wasunhappy with the VLB concentration on just the video interfaceand wanted to develop a general purpose bus. The objective wasan interface that was fast and inexpensive. It did not have tobe simple (advances in chip technology took care of that) andcould achieve a low cost by high volume production.PCI is a 64 bit interface in a 32 bit package. Figuring thisout requires a bit of arithmetic. The PCI bus runs at 33 MHzand can transfer 32 bits of data (four bytes) every clock tick. That sounds like a 32-bit bus. However, a clock tick at 33 MHzis 30 nanoseconds, and memory only has a speed of 70 nanoseconds. When the CPU fetches data from RAM, it has to wait at least threeclock ticks for the data. By transferring data every clock tick,the PCI bus can deliver the same throughput on a 32 bit interfacethat other parts of the machine deliver through a 64 bit path.The PCI bus has all the signals of the old ISA bus. This allowsa PCI adapter card to emulate older equipment. For example, aPCI disk controller can respond to the same addresses and generatethe same interrupts as the older disk controllers that the BIOSunderstands. However, PCI devices can also be self-configuringand operate in a Plug and Play mode.The PCI bus connects at one end to the CPU/memory bus and at theother end to a more traditional I/O bus. The PCI interface chipmay support the video adapter, the EIDE disk controller chip,and maybe two external adapter cards. A desktop machine willhave only one PCI chip, and so it will add a number of extra ISAonly slots. A server may add additional PCI chips, and extraserver slots will usually be EISA.While ISA and EISA are exclusively PC interfaces, the PCI busis now used in Power Macintosh systems and PowerPC machines. It may be attractive for minicomputers and other RISC workstations.

Current Status

Although the ISA bus may be ten years old, it remains a perfectlyreasonable option for devices that do not require highest performance.The consumer-oriented products all come with built-in video anddisk adapters. Those are the two components that have the greatestimpact on home computers and probably most desktop business machines.There simply isn't any need for a higher speed to support thesound card on a multimedia system, and the CD ROM is the sloweststorage device available.The higher end of the consumer market and the machines solddirectly to corporations typically have a few slots with a PCIinterface. It is nice to have, but in the next year or so theseslots may remain empty. The pre-installed devices cover mostrequirements, and storage expansion is simple and inexpensiveusing EIDE disks and devices.A Server comes in a full sized floor standing tower. Someservers have room for 18 disk drives. There will certainly bea PCI bus, but there will also be several standard SCSI adaptersto connect all the disks, tapes, and CD-ROM units. The PCI slotsmay be useful for an Ethernet adapter, although the PCI speedmay not be needed unless that adapter runs at 100 megabits ormore.Then there are a collection on non-PC devices that also usethe PCI bus. The Power Macintosh computers, the PowerPC, andsome models of Dec Alpha. It remains to be seen how widespreadthis use becomes.

Interrupts

An I/O bus is similar to bus between the CPU, mainboard controllogic, and memory. Both types of bus structure have address wires,data wires, and a similar set of housekeeping wires. Both busstructures must determine if an operation refers to memory oran I/O address. Both must distinguish between 8-bit, 16-bit, and32-bit operations. Both must be able to introduce "Wait States"to slow down the CPU when a device needs more time to completean operation.The most important difference between the CPU-memory local busand the I/O bus is the presence of Interrupt Request (IRQ)wires. The I/O bus has 15 separate IRQ wires. The CPU has onlyone interrupt pin. The chip set on the mainboard has to providea translation between the two.Without interrupts, the CPU must start an operation to a deviceand then spin in a loop asking, "Is it done yet? Is it doneyet? Is it done yet?" After a few hundred thousand tests,the device will signal that the operation is complete. Interruptsallow the CPU (particularly on a more advanced operating systemlike Windows 95, OS/2, or NT) to do some other work until theoperation is complete.When a device generates an interrupt, the CPU hardware stops runningan ordinary program and jumps to an interrupt handling routinein the Device Driver. The interrupt may signal that:A previous request is complete and the device can now starta new requestData has arrived that needs to be read (this happens mostlywith the keyboard, mouse, modem, or LAN).an error has been detected on an idle deviceAny device on the I/O bus can request an interrupt by placinga signal on one of the 15 IRQ wires. If more than one IRQ signalis received at the same time, the chip set on the mainboard hasto select the one with highest priority to process first. TheCPU is interrupted (by sending a signal on its one wire) and thechip set then transfer the identity of the IRQ level to be processed.Each IRQ wire goes to every slot in the I/O bus. An adapter cardis configured, physically with switches or logically with a utility)to use a specific IRQ value. The I/O bus on the first PC assumedthat each device would have its own IRQ line, so the circuit todrive an interrupt request was made very simple. Unfortunately,when two adapter cards are incorrectly configured with the sameIRQ value, and if both try to generate IRQ's at the same time,the result is to produce a short in the I/O bus. Usually thereis no damage, but the effect can be to burn out either card orto trash the mainboard.Later bus architectures (MCA, EISA, PCI) use safer circuitry thatallows two devices to share the same interrupt. When an interruptis shared, the system responds to an interrupt by calling thedevice driver for each device associated with that IRQ. The driverspoll their respective adapter cards to determine if there is anypending activity which requires a response. There is a slightloss of efficiency when interrupts are shared, but not enoughto cause worry.

Plug and Play

An adapter card designed for Microchannel, EISA, or PCI can handlethe IRQ problem automatically. However, the rest of the interfaceto advanced bus structures is expensive. The ISA bus interfaceis simple and cheap, but it requires the user to set the IRQ,either with physical switches on the card or through some kindof setup configuration utility. The solution to this problem isa new arrangement called "Plug and Play."To use Plug and Play you need three things:The PC has to be ready to do Plug and Play. Most new computershave this ability, and most old ones don't.The adapter card has to be enabled for Plug and Play. It mustminimally be able to report to the computer what I/O address andIRQ it is using or is able to use, and it must accept commandsto use the values that the computer selects for it.The operating system must be able to support Plug and Play.Currently, this limits you to Windows 95. Windows NT doesn't supportit, based presumably on the theory that anyone running NT betterbe sophisticated enough that IRQ issues are no problem. OS/2 doesn'tsupport it yet.A more expensive but more widely supported alternative to Plugand Play is provided by the PCMCIA interface to "Credit CardAdapters" used in most laptop computers. This interface wasdesigned to be self-configuring. Technically it uses softwarecalled "socket services" and "card services,"but these have the same effect as Plug and Play. The system dynamicallyassignes I/O addresses and IRQ values to the cards during bootprocessing or when the cards are inserted. Windows NT and OS/2both support a large number of PCMCIA cards even through theydo not support Plug and Play.

The ISA Bus is SLOW!

The CPU uses the OUT instruction to send data or commands to anI/O device, and it uses the IN instruction to read data or statusfrom the device. These instructions cause the address of the I/Odevice to be placed on the bus, and they flag one of the housekeepingwires in the bus to indicate that this is an I/O address and nota memory address.Each device is configured to respond to a range of addresses (the"ports"). Generally, a device will respond to a rangeof eight addresses. For example, the COM1 port responds to addresses03F8 to 03FF. When the device sees an I/O address on the bus thatmatches a value in its range, it responds.A device uses each address to process a different type of commandor generate a different type of status. COM1, for example, usesthe first address of 03F8 to handle all the data. The remainingfour addresses are used to configure the line (speed, parity),to control the phone (hang-up, begin), to check modem status,and perform other housekeeping.Unfortunately, it is still possible to plug a card built in 1984into a modern PC. The I/O bus cannot know how fast a device isable to operate, so it handles the worst case and slows everythingdown to match the speeds used ten years ago. The chip set on themain board generates a long stream of Wait State signals, forcingthe CPU to wait for 250 nanoseconds. The device itself can respondto request more Wait States to give itself even longer to respond.All this time, the CPU is stopped dead waiting for the IN or OUTinstruction to end.

Running with the Brake

A department is having performance problems with a LAN databaseserver running on a workstation. They call in a performance specialistwho normally works with mainframes and minicomputers.The CPU is running 100% busy. Since the machine has a socket forupgrading the CPU, the specialist suggests buying a Pentium chipand replacing the old 33 MHz 486. In theory, the system wouldthen be 10 times faster.They spend $600, get the new chip, plug it in, and the serveris instantly 100% busy. Worse, it is not actually getting anymore work done. What went wrong?A mainframe or minicomputer has an I/O bus which is separate fromthe CPU. However, on an ISA bus the two are logically interconnected.An I/O device such as a disk controller or LAN adapter runs atsome speed and inserts enough wait states into the CPU bus toslow the processor down to match the device speed.Every time the Pentium tries to read or write data from a slowadapter card, the I/O device adds Wait States to the bus to haltthe CPU until the device can complete its operation. Unlike themainframe definition of "Wait," a PC Wait State causesthe CPU to appear busy. However, the operation proceeds at thespeed of the device and not that of the CPU. Upgrading the CPUchip did not make the device any faster, so the system still appearsto be busy all the time. The correct response would have beento upgrade the old dumb slow devices.

The Bleeding Edge

A modern PC will support almost any adapter card ever built forany earlier model of machine. However, just because it runs doesn'tmean that you should use it. This is especially true of old LANadapters. Pull out an old 3C503 Ethernet card or an IBM TokenRing card and you will frequently find that the card plugs intoonly one socket of the ISA bus instead of two sockets. This cardhas an "eight bit edge" that transfers one byte of dataper bus cycle. Such cards may be reused in lightly used desktopsystems, but they should never be used in a Server or in a higherperformance machine.There are also some eight bit interfaces on old CD-ROM interfacecards. Vendor even built eight bit SCSI adapters. Such cardsshould not be used in a Server, or any machine where performanceis critical. Even if the device connected to the card is notimportant, the use of the card will slow down the machine foreveryone. The ISA bus needs 375 nanoseconds to read any datafrom any device. If the LAN adapter presents only one byte, thenthe CPU has to wait another 375 nanoseconds to get the secondbyte of data. In contrast, the PCI bus can deliver four bytesof data in 30 nanoseconds.

Direct Memory Access

All PC devices support Programmed I/O (PIO). The operating systemexecutes IN and OUT instructions to read or write data one, two,or four bytes at a time to the device. For simple devices likethe keyboard or display this may be perfectly reasonable. DOSand Windows 3.x do not support multitasking, so the CPU isn'tdoing anything useful while any device is busy.A smarter device can transfer data directly to memory withoutthe use of the CPU. This is called Direct Memory Access or DMA.Some DMA capability was designed into the first IBM PC. However,DMA dropped out of favor during the 1980's. The problem is thatthe original DMA design required additional bus cycles, and wastherefore slower than Programmed I/O. As long as DOS was the primaryoperating system, it was better to disable or bypass DMA and letthe CPU do the work.One special case was the Multimedia Sound Card. A DOS or Windowsgame stores data representing some music or speech in a buffer. It then passes the sound card the address of the data and itslength. The card uses DMA to fetch bytes of sound and play themwhile the CPU proceeds to show video or run the game. When thebuffer is used up, the sound card generates and interrupt andthe program provides a new buffer of data.There are a set of DMA controller chips on the Mainboard. EachDMA circuit has a level number and can support one device. Wheninstalling new adapters, it is important to avoid conflicts forthe DMA number just as one avoids conflicts for the I/O addressor interrupt level.A program stores into the DMA circuit a starting memory bufferaddress and length. When the device is ready for more data, ituses one bus cycle to send a request to the DMA chip, the chipthen substitutes for the CPU in generating the next buffer addressto the memory circuits to fetch the next chunk of data for thedevice. The CPU can be running other programs. However, thatfirst signal from the device to the DMA chip takes one more buscycle than ordinary Programmed I/O. Thus DMA has not been attractivefor disk, LAN, and other performance critical I/O.

Busmaster

On a Microchannel, EISA, or PCI machine, the I/O bus presentsa full set of 32 address wires to every adapter card. The adaptercan then generate a memory address to reference any location inRAM. A Busmaster adapter card has its own Direct Memory Accesscontrol chip on the adapter board. That chip can generate a sequenceof memory addresses to read data from memory to the adapter, orto write data from the adapter to memory.Since DMA and I/O functions are combined on the same card, theycan be tightly coordinated. A Busmaster EISA device can transferdata every other cycle, and PCI Busmaster cards can move datain every I/O cycle.The software on the PC builds a high level request to READ orWRITE an entire buffer of data. It passes the address and sizeof the buffer to the Busmaster card. Then the PC software doessomething else.Internally the Busmaster card moves data between itself and thebuffer in memory. When the entire buffer has been processed, itgenerates an interrupt to the CPU indicating that the requestis complete.In order to make effective use of a Busmaster adapter you needtwo things. First, you need to have something else to do whilethe adapter performs the I/O. Secondly, you need an operatingsystem that will allow I/O to run in the background. GenerallyBusmaster adapters make sense only on Server machines runninga multitasking operating system (Windows NT, OS/2, UNIX, or Netware).ContinueBackPCLTCopyright 1995 PCLT -- Introductionto PC Hardware -- H. Gilbert This document generated by SpHyDir,another fine product of PC Lube and Tune.
 

This

article

covers

bus,

its

history

and

status,

PCI,

EISA,

MCA,

bus

mastering,

plug

and

play,

and

the

bleeding

edge.

From

Introduction

to

PC

Hardware.

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